1. Field of the Invention
The present invention relates to an on-screen signal processing apparatus for displaying complicated indication such as characters and graphics on a screen outputted from an AV (Audio and Visual) device while reducing a capacity of a memory.
2. Description of the Related Art
A general processing in a conventional on-screen signal processing apparatus was to store data including character, its color and simple attribute in a display memory, read in display data at an appropriate timing based on horizontal and vertical synchronous signals, obtain font data from a character generator ROM and the pixels in consideration of the color and attribute are displayed on a display device.
FIG. 29 is a schematic block diagram of a conventional on-screen signal processing apparatus. A program, display pattern data and the like are stored in ROM 12. A CPU 11 obtains the display pattern data from the ROM 12 via a ROM interface 13. The CPU 11 prepares the display data including the character, its color and attribute based on the obtained display pattern data and store the generated display data in a part of the built-in RAM 14 via a RAM interface 15. The display data including the character, its color and simple attribute stored in the built-in RAM 14 is written in a character generator line memory 18 via a DMA interface 17. Writing-in operation is executed by a DMA (Direct Memory Access) 17. When the display data is written, an arbiter 16 mediates a bus based on the horizontal and vertical synchronous signals.
A character generator 21 reads the display data from the character generator line memory 18 and obtains font data corresponding to the display data from a font ROM 19 via a ROM interface 20. Further, the character generator 21 performs color-conversion to the obtained font data in accordance with a color look-up table (CLUT) 22 and further decorates the font data in accordance with the attribute, and then, outputs the resulting signals (R, G, B, YS and YM) from a converter 23.
FIGS. 30A and 30B show examples of a setting code for the color and attribute of the display data. A decoration code includes character color setting, character background color setting, flashing display ON/OFF, bordering display ON/OFF, italic display ON/OFF and underline display ON/OFF.
FIGS. 31A and 31B shows a mapping example of the built-in RAM 14. FIGS. 32A and 32B show a diagram illustrated settings of the display memory when font data of a letter “A” and “A” are displayed. When “A” is displayed as a first character in a first line, for example, decoration code data shown in FIG. 32B is set as a first code in the first line shown in FIG. 31B, and a character code shown in FIG. 32B is set as a second code.
In contrast to the character generator method described above, there is a bit map method capable of displaying complicated data, wherein a plurality of bits is allocated to one pixel so that the data is displayed per pixel. This method requires a memory equivalent to a display screen.
FIG. 33 is a schematic block diagram of an on-screen signal processing apparatus based on the bit map method. The ROM 12 stores therein a program, binary font data, bit map data and the like, and the CPU 11 obtains the binary font data and the bit map data from the ROM 12 via the ROM interface 13. The CPU 11 develops the obtained font data and bit map data per pixel in a part of a SDRAM (Synchronous Dynamic Random Access Memory) 24, which is an external memory, via a SDRAM interface 25 to thereby prepare the display data, and stores the prepared display data in a part of the SDRAM (Synchronous Dynamic Random Access Memory) 24. The display data equivalent of one line stored in the SDRAM 24 is written in a bit map image processing line memory 26 via the DMA interface 17. Writing-in operation is executed via the DMA interface 17. When the data is written, the arbiter 16 mediates the bus based on the horizontal and vertical signals. A bit map image processor 27 performs color-conversion to the display data written in the bit map image processing line memory 26 in accordance with a first color look-up table (CLUT) 28, and outputs the resulting signals (R, G, B, YS and YM) from a first converter 29.
FIGS. 34A and 34B show an example of the display data prepared in the SDRAM 24 when “A” is displayed in the case where one pixel is processed by four bits. A character color of “A” is displayed in a color designated in 15th (f) in the color look-up table 28, and a background color thereof is displayed in a color designated in 0th in the color look-up table 28.
In the on-screen signal processing apparatus according to the conventional character generator method, there are limitations in a circuit for realizing the complicate display, which fails to satisfy end users' demand for high-definition GUI (Graphical User Interface) in recent years. More specifically, in the conventional technology wherein a font size was fixed, there was no choice except using a same font size for GUI and subtitle, which makes a GUI design monotonous.
The on-screen signal processing apparatus according to the bit map method is capable of the complicated display, however, requires a large-capacity memory, and it is necessary for a microcontroller which generates the display data to operate at a high speed, which makes a system itself expensive. The display in VGA (Video Graphic Array) size according to the bit map method in which one pixel is expressed by four bits requires the display memory having the capacity of 640*480*4=1228800 bits=150 KB.
In order to eliminate such disadvantages, a constitution, wherein pixel memories equivalent in at least two horizontal scan lines comprising pixel data in which a plurality of bits constitute one pixel are switched under the control of the microcontroller so as to be displayed, was proposed. The constitution is recited in, for example, No. H09-214849 of the Japanese Patent Applications Laid-Open. However, the constitution requires the processing by the microcontroller every horizontal synchronous signal in real time, which makes it necessary to increase the speed of the microcontroller so that any processing other than OSD (On Screen Display) is not thereby affected. Therefore, it was not possible to reduce system costs to an expected level.